The manufacture of semiconductor devices includes formation of conductive and dielectric structures as well as the formation of impurity zones predominantly at a front side of a semiconductor substrate such as a silicon wafer. Formation of dielectric structures and patterned impurity zones on a rear side subsequent to a processing on the wafer front side is subject to strict process constraints. For example, the thermal budget available for rear side processing may be limited resulting in further restrictions as regards applicable materials. It is desirable to provide a method of manufacturing semiconductor devices that simplifies the formation of patterned structures at the wafer rear side as well as to provide semiconductor devices with patterned rear sides.